Contest Details

Theme: Artificial Intelligence at the Edge!


In today’s connected world, more and more data is being generated and processed locally, and now AI is expanding into new arenas including smart cities, robotics, smart retail, autonomous drones, health and safety.


2019 Innovate FPGA Design contest invites you to demonstrate your visions of how FPGAs can be used to develop smart devices at the edge using one of the following platforms: Terasic OpenVINO Starter Kit or Terasic DE10-Nano Kit. This is an opportunity for you to showcase your innovation with a real-world design using FPGAs!


★Teams who advance into second round will receive a FREE contest kit that each team selected upon registration.


You are welcome to use Intel's FPGA AI Engine (OpenVINO/DLA) which is customizable to many different networks, or you could build your own AI engine from the ground up!

Important Dates:

  •  Registration and design proposal submission due:  June 30

  •  Proposal selection: July 1- July 7

  •  Announce regional finalists and send contest kits:  July 8 – July 15

  •  Design development:  July 8 – Oct 8

  •  Design paper and video submission due: October 8

  •  Regional Final Selection:  Oct 8 – 23

  •  Announce Grand Finalists:  Oct 24

  •  Greater China regional final event (only for Greater China region): Nov. in China. (Date and location will be announced soon)

  •  Grand Final Event at FPT Tianjin: Dec 10 -12, 2019

Contest Platforms
Terasic DE10-Nano Kit Terasic OpenVINO Starter Kit

Registration and Submission

Go to and register as a developer in your own region. You will receive a confirmation email and a unique team ID upon registration. Once registered, choose your targeted contest platform from the two development kits (DE10-Nano Kit or OpenVINO Starter Kit) and submit your design proposal based on the kit you select to InnovateFPGA website before June 30, 2019.

For more information about the required submission items in each stage, please visit